With increasing integration density of semiconductor devices and chip size reduction, formation of finer wirings or a narrower pitch in a multilayer structure is now in progress. Consequently, the time of delay in propagation of signals through wirings, i.e. delay in signal propagation through wirings, becomes longer, causing a serious problem in the use of semiconductor device-mounted electronic appliances.
Generally, the speed of signal propagation through wirings depends on a product (RC) of wiring resistance (R) by interwiring capacitance (C), and thus it is necessary for improving the delay in signal propagation through wirings to lower the wiring resistance and decrease the interwiring capacitance, i.e. to make the dielectric constant of an interlayer insulating film lower.
Heretofore, inorganic materials have been used for the interlayer insulating film in the semiconductor device, for example, SiO2 film (relative dielectric constant: approximately 4.0), SiN film (relative dielectric constant: approximately 7.0) or the like, each formed by CVD (chemical vapor deposition) process. Recently, a SiOF film (relative dielectric constant: approximately 3.7) have been used very often as a low-dielectric constant material film formed by said conventional process.
However, owing to the still relatively high dielectric constant, the SiO2 film is not so effective for lowering the interlayer capacitance, when used as an interlayer insulating film, and thus materials of much lower dielectric constant are required for the next or further generation semiconductor devices.
Organic materials are now extensively studied as materials for interlayer insulating films having a relative dielectric constant of not more than 3.0, and such polymer materials as polyimide, polyparaxylylene, polyarylene ether, polyarylene, polybenzocyclobutene, polynaphthalene, etc., all of which are hydrocarbon-based resins, are known as materials for interlayer insulating film. Carbon atoms contained in these materials contribute to a decrease in the film density, while lower polarizability of their molecules (monomers) per se contributes to a lower dielectric constant. Introduction of imido bonds or aromatic rings thereto assures the heat resistance to some extent.
In the patterning of interlayer insulating films including organic insulating films by means of a photo-resist, their etching characteristics largely depend on the film compositions. Said low-dielectric constant films contain carbon, hydrogen, etc. which are common elements to those of the photo-resist, and thus the etching characteristics of these films and the photo-resist show a similar tendency. That is, in the patterning of said low-dielectric constant films through such a photo-resist, it is known that the low-dielectric constant films are also oxidized during the step of removing the resist (by oxygen plasma treatment, etc.) after the patterning step, resulting in reduction in the film thickness or degradation of film quality.
To solve these problems, JP-A-10-112503 discloses the so called “hard mask” process comprising transferring a resist pattern onto an inorganic material such as a SiO2 film, etc. at first and then forming a via hole or trench pattern in a low-dielectric constant film by means of the inorganic material as a mask. Furthermore, a dual hard mask (using hard masks in a double layer) is disclosed as an improved hard mask process in IEEE International Electron Devices Meeting Technical Digest, p.p. 623-626 (1999).
One prior art example of a process for producing a semiconductor device is shown in FIG. 1. At first, organic low-dielectric constant material 2 is applied to silicon substrate 1 [FIG. 1(a)], and thermoset by stepwise heating up to cure baking at about 400° C. to form a film [FIG. 1(b)]. Then, silicon oxide film 3 is formed on organic low-dielectric constant film 2, for example, by known CVD process [FIG. 1(c)]. Then, a photo-resist film is formed on silicon oxide film 3 [FIG. 1(d)], and resist pattern 4 for forming a wiring pattern is formed on silicon oxide film 3 by known photolithography [FIG. 1(e)]. Then, silicon oxide film 3 is etched by means of resist pattern 4 as a mask, using an etching gas containing, e.g. CF4 as the main component [FIG. 1(f)]. Still further, organic low-dielectric constant film 2 is etched by means of resist pattern 4 and silicon oxide film 3 as a mask, using an oxygen-containing etching gas, where resist pattern 4 is also removed at the same time [FIG. 1(g)], thereby forming opening 5 having a wiring pattern configuration. Then, the pattern inside is washed with, e.g. a neutral stripping solution, followed by drying and baking to form a wiring pattern [FIG. 1(h)].
However, said prior art process has serious problems such as complication of process steps as comared with a process using an ordinary resin resist as a mask and residues of hard mask material comprising a silicon oxide film having a high relative dielectric constant being left as part of the interlayer insulating material, resulting in an inevitable increase in the effective relative dielectric constant as compared with the case of using only a low-dielectric constant film.